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open-hardware-repository-cern-10 Welcome to the Open Hardware Repository, a place on the web for electronics designers at experimental physics facilities to collaborate on open hardware designs, much in the philosophy of the free software movement. More info at the Wiki page More info about the CERN Open Hardware licence More info about the www.- site support. The CERN Open Hardware Licence was originally written for CERN designs hosted in the Open Hardware Repository. It can also be used by any designer wishing to share design information using a licence compliant with the OSHW definition criteria. Most projects in the Open Hardware Repository OHR Many projects on GitHub (Google search for CERN OHL site:www.- ) results on 23/3/18, results on 10/10/18, on 19/12/18 Many projects on GitHub (Google search for "CERN OHL" site:www.- , with quotes)? results on 23/3/18, results on 10/10/18, on 19/12/
Project description. The OPT ADC 10k 32b 1cha is a single channel 10kSPS 32 bit ADC card in the format defined by the CERN TE-EPC group for use with the Function Generator Controller (FGC ). It is also known under the name HPM The device is a metrology-grade ADC for the highest accuracy class in the HL-LHC accelerator. Javier Serrano first experienced the open and collaborative culture of CERN as a summer student. Since becoming a staff member in , he has contributed to this culture by championing the establishment of the Open Hardware Repository and the Open Hardware Licence to facilitate the sharing of open-hardware design. As head of the Hardware and Timing section of the Beams Controls group, he. Entered design in CERN's open hardware repository. A series of 10 modules has been produced by INCAA on request of Adriaan. After optimisation of the FPGA driver for the module testing shows that time stamping a known input pulse (WR PPS) we obtain a delay of ns Open Hardware Repository Cern Index without any measurable jitter, clocking the cRIO FPGA at MHz.

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